4 дня назад
Physical Design Engineer Intern (Semiconductor)
29 - 57$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Physical Design Engineer Intern (Semiconductor): Developing and analyzing ASIC and processor physical designs from synthesis through GDSII implementation, with an accent on floor planning, place and route, clock insertion, and timing closure. Focus on debugging design violations, resolving congestion and timing bottlenecks, and meeting performance, power, and area requirements.
Location: Santa Clara, California, United States
Salary: $29–$57 per hour
Company
develops semiconductor solutions for enterprise, cloud, AI, storage, networking, and carrier infrastructure.
What you will do
- Perform synthesis, floor planning, place and route, clock insertion, timing analysis, and timing closure for complex logic blocks.
- Use industry-standard EDA tools including Synopsys PrimeTime and Cadence Tempus.
- Write Python, TCL, Perl, and Shell scripts to support design and development activities.
- Analyze and debug design violations and implement fixes using CAD tools.
- Collaborate with RTL, synthesis, and other design teams to resolve congestion and timing bottlenecks.
- Support design convergence and integration while meeting performance, power, and area requirements.
Requirements
- Currently enrolled in a bachelor's degree program in electrical engineering, computer engineering, or a related field, with expected graduation between Fall 2027 and Summer 2028.
- Coursework in VLSI, digital logic, circuit design, computer architecture, RTL synthesis, Verilog or SystemVerilog, place and route, static timing analysis, digital systems, or microelectronics.
- Proficiency in Python, TCL, Perl, and Shell scripting.
- Experience working in a Unix-type environment.
- Experience with Synopsys PrimeTime, Cadence Tempus, and Mentor tools.
- Strong analytical, problem-solving, and communication skills.
Culture & Benefits
- Interns receive medical, dental, and vision coverage.
- Benefits include mental health resources, paid holidays, perks, and discounts.
- The role is eligible for bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
- Additional compensation may be available for intern PhD candidates.
- Access to export-controlled technology may require an export license review under U.S. regulations.
Hiring process
- Interviews evaluate individual experience, thought process, and communication skills in real time.
- AI tools, transcription applications, automated answer generators, and note-taking bots are not permitted during interviews.
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