Design Verification Intern, MS - Summer 2027

Location: Santa Clara, CA, United States

Salary: $35–$70 per hour, plus eligibility for bonus and equity plans.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, storage, networking, and data infrastructure.

What you will do

• Study the architecture and operation of next-generation processors.
• Create simulation environments using industry-standard verification tools.
• Develop automated tests to identify, troubleshoot, and reproduce chip flaws and simulation failures.
• Analyze test coverage results and verification metrics.
• Collaborate with chip architects, designers, software engineers, and physical design teams.

Requirements

• Currently enrolled in a master's degree in electrical engineering, computer engineering, or a related field, with expected graduation between Fall 2027 and Summer 2028.
• Coursework in computer architecture, logic, processors, memory systems, Verilog, VLSI, VHDL, UVM, digital logic, SoC/ASIC design, verification, and signal processing.
• Programming or scripting experience with Python, C, C++, Perl, or Java.
• Experience with Synopsys, Cadence, or Mentor tools for simulations and testbench development and debugging.
• Hands-on experience with RTL integration and system bring-up.
• Strong debugging, analytical, problem-solving, and communication skills.

Culture & Benefits

• Collaborative work with cross-functional teams building production semiconductor solutions.
• Medical, dental, and vision coverage for interns.
• Mental health resources, paid holidays, perks, and discounts.
• Additional compensation may be available for intern PhD candidates.
• Access to export-controlled technology may require an export license review under U.S. regulations.

Hiring process

• Interviews evaluate individual experience, problem-solving, and communication skills in real time.
• AI tools, transcription applications, automated note-taking bots, and real-time answer generators are not permitted during interviews.