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3 дня назад

Sr. Advanced Semiconductor Packaging Engineer (Quantum Computing)

115 000 - 135 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
UK/Singapore/US +2 еще
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Sr. Advanced Semiconductor Packaging Engineer (Quantum Computing): Developing innovative and reliable packaging schemes for highly scaled ion traps in quantum computers with an accent on mechanical, thermal, electrical, optical, and detection interfaces. Focus on large-format ion trap chips, high-density I/O, heterogeneous 2.5D/3D integration, vendor process validation, and cross-functional system compatibility.

Location: Brooklyn Park, Minnesota, United States; on-site. Applicants must be U.S. Persons as defined in the posting. Candidates must not be nationals of China or Russia unless they are also U.S. citizens.

Salary: $115,000–$135,000 annually.

Company

hirify.global develops a full-stack quantum computing platform for real-world applications across research and industry.

What you will do

  • Develop advanced packaging concepts for mechanical, thermal, electrical, optical, and detection interfaces to next-generation ion traps.
  • Create packaging strategies and processes for large-format ion trap chips with high I/O signal count and density.
  • Work with vendors to implement and validate semiconductor packaging processes.
  • Support all stages of ion trap development and ensure compatibility with packaging requirements.
  • Coordinate with ASIC, ion trap, fabrication, optical design, and broader system teams.
  • Build supplier relationships, partnerships, and co-development opportunities with third parties.

Requirements

  • Bachelor’s degree or higher.
  • At least 5 years of experience in an engineering or R&D environment.
  • At least 3 years of experience developing advanced semiconductor packaging.
  • Experience with advanced packaging concepts and cross-functional technical collaboration.
  • U.S. Person status is required, including U.S. citizenship, permanent residence, or qualifying asylum or refugee status.
  • Due to national security requirements, Chinese or Russian nationals must also be U.S. citizens.

Nice to have

  • PhD in Physics or Engineering.
  • Experience with large-area multi-chip packaging, heterogeneous integration, and 2.5D/3D packaging.
  • Experience with high-density I/O, photonic packaging, and fiber-to-chip coupling.
  • Track record of innovation and intellectual property development.

Culture & Benefits

  • Fast-paced, multifunctional, team-based technical environment.
  • Employer-subsidized medical, dental, and vision insurance.
  • 401(k) plan with company match and student loan repayment benefit.
  • Equity opportunities, paid time off, sick leave, and 12 paid holidays.
  • Paid parental leave and employee discount programs.
  • Pre-employment drug testing is required for safety-sensitive positions.

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