Memory Circuit Design Engineer (CMOS)

Location: Austin, Texas, United States; hybrid work model with time split between the assigned hirify.global site and off-site work.

Annual salary: $164,470–$269,100 USD.

Company

hirify.global develops advanced computing technologies, including memory technologies for next-generation CPUs and SoCs.

What you will do

• Design and develop full-custom and compiler-based SRAMs, caches, multi-ported register files, ROMs, custom memories, and associated digital circuits.
• Perform memory circuit design, technical readiness activities, characterization, and dynamic simulations.
• Design caches, critical paths, custom blocks, memory arrays, IP, bit-cells, and complex peripheral circuits.
• Conduct memory path-finding and optimize power, performance, area, and scalability on advanced CMOS process technologies.
• Define methodologies, automate memory circuit and IC design activities, and execute project schedules.
• Collaborate with architecture, design, process technology, physical design, and product engineering teams.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a STEM-related field plus 6+ years of experience; or a Master’s degree in the same fields plus 4+ years of experience; or a PhD in the same fields plus 2+ years of educational or work experience.
• Proficiency in CMOS circuit design, memory design, and circuit trade-offs involving power, performance, and area.
• Expertise in Very Large Scale Integration (VLSI) circuits and design methodologies.
• Strong technical curiosity and passion for solving complex memory and circuit design challenges.
• Ability to independently drive solutions from concept through implementation.
• Excellent analytical, problem-solving, collaboration, and communication skills across multidisciplinary teams.
• Ability to balance technical innovation with execution against project schedules and work effectively in a fast-paced, dynamic environment.

Nice to have

• Experience with low-power implementation techniques.
• Familiarity with circuit and layout trade-offs for optimized design.
• Knowledge of industry-standard digital circuit design tools, flows, and methodologies, dynamic simulations, variation analysis, and signal integrity analysis.

Culture & Benefits

• Collaborative work with architects, circuit designers, and process technology experts.
• Hybrid work model combining on-site and off-site work.
• Competitive pay, stock bonuses, health benefits, retirement benefits, and vacation.
• Work focused on advanced memory technologies for future CPU and SoC platforms.