14 часов назад
Modeling Architect (AI)
170 000 - 200 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Modeling Architect (AI): Building analytical, functional, performance, and power models for the T100 optical inference accelerator with an accent on hardware/software co-design, AI workload modeling, and silicon photonics. Focus on designing memory and compute hierarchies, simulating event-driven and RTL models, and correlating architecture results across compiler, runtime, and hardware teams.
Location: On-site in Austin, Texas, or Sunnyvale, California, United States
Salary: $170,000–$200,000 per year, plus equity
Company
is an AI hardware startup developing silicon photonics and programmable metasurface technology for energy-efficient, high-performance AI inference.
What you will do
- Model the architecture and system performance of the T100 optical inference accelerator.
- Bring up dense, Mixture of Experts, hybrid/SSM transformer, retrieval, speech, vision, and recommendation workloads.
- Bind Hugging Face and PyTorch workloads to the programming model and execute them on functional models.
- Co-design tiling, scheduling, the ISA, SRAM and HBM hierarchies, and multi-chip mappings.
- Build Python, C++, cycle-approximate, power, functional, and RTL simulation models for compute, memory, and hardware/software interfaces.
- Document tests, configurations, assumptions, plots, and results, and collaborate with architecture, compiler, runtime, and RTL teams.
Requirements
- BS or MS in Computer Engineering, Electrical Engineering, Computer Science, or a related field.
- 3+ years of experience in hardware modeling, performance simulation, computer architecture, or related work.
- Proficiency in Python or modern C++17 or later.
- Working knowledge of pipelines, caches, memory hierarchies, microarchitecture, and ISA design.
- Ability to convert LLM, GEMM, or accelerator research into workload configurations using Hugging Face or PyTorch.
- Strong debugging skills and disciplined documentation of experiments and assumptions.
Nice to have
- Experience with roofline or limiter analysis, GPU benchmarking, or model correlation.
- Experience with event-driven, cycle-approximate, or cycle-accurate simulation using SystemC, gem5, SST, or custom kernels.
- Experience with SystemVerilog, Verilog, Verilator, or RTL co-simulation.
- Experience with HBM, DRAM, cache, SRAM, NoC, AXI, or DMA.
- Familiarity with CUDA, GPU programming, or PyTorch internals.
Culture & Benefits
- Collaborative work with experienced engineers across architecture, compiler, runtime, and RTL disciplines.
- Health plan premiums covered for employees and dependents, with HSA contributions.
- Unlimited paid time off.
- 401(k) matching and stock option opportunities.
- Dental, vision, life, hospital, critical illness, and accident insurance options.
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