7 дней назад
Staff VLSI Design Engineer (NAND Flash)
147 800 - 251 200$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Staff VLSI Design Engineer (NAND Flash): Designing and delivering digital NAND Flash memory circuits from microarchitecture through RTL, verification, synthesis, and timing closure with an accent on power, performance, and area optimization. Focus on chip-level integration, full-product logic design, post-silicon debugging, and mentoring junior engineers.
Location: Milpitas, California, United States; onsite at the Milpitas office
Salary: $147,800–$251,200 per year
Company
develops Flash memory and advanced memory technology products for global data storage needs.
What you will do
- Lead digital design projects for NAND Flash memory, covering microarchitecture, RTL design, verification, synthesis, and timing analysis.
- Develop and verify RTL in Verilog, perform RTL linting, clock domain crossing analysis, design integration, DFT, and timing closure.
- Balance modularity, scalability, power, area, and performance trade-offs to meet design goals.
- Collaborate with internal and external engineering teams and customers to define technical specifications and features.
- Participate in post-silicon evaluation and debugging and support productization.
- Provide technical guidance and mentoring to junior engineers.
Requirements
- Master of Science in Electrical Engineering or a related field, plus 6–8 years of relevant experience.
- Experience with chip-level integration, chip leadership, and the full logic design product lifecycle.
- Knowledge of the logic design flow from RTL to GDSII, including simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, and physical verification.
- Working knowledge of NAND Flash memory cell operations and program, read, and erase algorithms.
- Excellent written and verbal communication, interpersonal skills, troubleshooting ability, and experience working effectively across teams.
Nice to have
- Experience designing digital circuits for low-power operating conditions and knowledge of device physics and process technology.
- Knowledge of NAND Flash Analog, Core, Datapath, and IO circuit design.
- Experience with Synopsys or Cadence synthesis, static timing, and place-and-route tools.
- Familiarity with revision control, Liberty timing models, and SDC constraints.
- Programming experience in C, C++, Python, or Perl.
Culture & Benefits
- Entrepreneurial, fast-paced engineering environment operating like a startup within .
- Paid vacation and sick leave, medical, dental, and vision insurance, and life, accident, and disability insurance.
- Flexible spending and health savings accounts, employee assistance, tuition reimbursement, and transit benefits.
- Eligibility for short-term incentives, possible long-term incentives or RSUs, an employee stock purchase plan, and a 401(k) savings plan.
- Inclusive workplace with equal employment opportunities and disability accommodations during the hiring process.
Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →
Похожие вакансии
9 дней назад
ASIC Design Team Lead (VHDL)
130 612 - 239 062$
6 дней назад
Senior Digital/AMS Validation and Integration Engineer (Automotive SerDes)
166 200 - 228 500$
7 дней назад
Principal Engineer, SOC Design
219 000 - 351 000$
8 дней назад
RTL Engineer (FPGA)
136 080 - 201 050$
8 дней назад
RTL Design Tech Lead (ASIC/SoC)
250 000 - 350 000$
8 дней назад
Design Engineer - STA
109 700 - 175 500$