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12 дней назад

Lead Vector Compute Architect (GPU)

Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US/Taiwan
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Lead Vector Compute Architect (GPU): Defining next-generation GPU data-parallel compute architectures for graphics, HPC, and system management with an accent on microarchitecture, memory systems, and performance modeling. Focus on balancing performance, power, area, bandwidth, latency, and scalability while collaborating across RTL, verification, firmware, software, and systems teams.

Location: Taiwan, Hsinchu

Company

hirify.global is a semiconductor startup based in Sunnyvale, California, building high-performance and energy-efficient graphics processors for immersive content creation and consumption.

What you will do

  • Define data-parallel GPU microarchitecture within ISA constraints.
  • Lead architecture tradeoff analysis across performance, power, area, bandwidth, latency, and scalability.
  • Develop system architecture specifications, interface definitions, and microarchitecture requirements.
  • Lead workload analysis, performance modeling, and bottleneck identification using C, C++, SystemC, or similar environments.
  • Define memory hierarchy, cache structures, and coherency architecture.
  • Collaborate with RTL, verification, physical design, firmware, software, and systems teams through silicon bring-up, debugging, tuning, and post-silicon optimization.

Requirements

  • 6+ years of experience in modern data-parallel microarchitecture.
  • Strong understanding of data-parallel microarchitectures, subsystem integration, workload characterization, profiling, and performance modeling.
  • Experience with out-of-order data dependency and control, utilization or occupancy optimization, and high-performance architecture design.
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Strong knowledge of RTL development and verification methodologies, architecture modeling, and performance analysis tools.
  • Excellent problem-solving, communication, and leadership skills.

Nice to have

  • Experience with CPU, GPU, or NPU architectures; NoC or interconnect architectures; or cache coherency protocols such as CHI, ACE, or CXL.
  • Experience with PCIe, UCIe, Ethernet, DDR, LPDDR, HBM, or GDDR memory systems.
  • Experience with power, performance, and area optimization.
  • Familiarity with firmware and software interaction in complex SoC systems.

Culture & Benefits

  • First-principles approach to solving complex engineering problems.
  • Values include fearless experimentation, adaptability, and collaborative learning.
  • Inclusive environment focused on professionalism, integrity, and respect.
  • Compensation is at the market rate for Taiwan and varies according to qualifications, experience, and location.

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