Назад
Company hidden
2 дня назад

CPU Circuit Memory Design Engineer

141 910 - 200 340$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
CPU Circuit Memory Design Engineer (CMOS/VLSI memory circuits): Designing and optimizing embedded memory solutions such as SRAMs, caches, register files, ROMs, and memory arrays for high-performance, power-efficient CPUs and SoCs with an accent on circuit characterization, simulation, and power/performance/area optimization. Focus on developing memory bit-cells and periphery circuits, simulating critical paths, automating design flows, and creating solutions on advanced process technologies.

Location: Austin, Texas, United States; hybrid work model with time split between the assigned hirify.global site and off-site work

Annual salary: $141,910–$200,340 USD

Company

hirify.global develops processors, embedded memory technologies, and silicon platforms for CPUs, SoCs, and AI-driven computing.

What you will do

  • Design, simulate, characterize, and optimize custom and compiler-based embedded memory solutions, including SRAMs, caches, register files, and ROMs.
  • Develop cache circuits, critical-path simulations, custom blocks, memory arrays, and memory IP within stringent power, performance, and area constraints.
  • Design memory bit-cells and complex peripheral IC circuits, including automation for memory design workflows.
  • Perform memory path-finding and power, performance, and area optimization for advanced process technologies.
  • Define methodologies and execute project schedules while collaborating with architecture, circuit design, physical design, process technology, and validation teams.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a STEM-related field with 4+ years of relevant experience; alternatively, a master’s degree with 2+ years or a PhD with 1 year of relevant experience.
  • Experience with CMOS circuit design, digital logic optimization, and power, performance, and area trade-offs.
  • Experience with VLSI circuits and design methodologies.
  • Ability to work in the Austin, Texas hybrid model, combining on-site and off-site work.

Nice to have

  • Experience with low-power implementation techniques and memory design.
  • Familiarity with circuit and layout trade-offs for optimized designs.
  • Knowledge of EBB design tools, flows, methodologies, and signal integrity analysis.

Culture & Benefits

  • Collaboration with architecture, design, layout, process, and validation teams on CPU and SoC technologies.
  • Health, retirement, and vacation benefits.
  • Competitive pay and stock bonuses.
  • Opportunities to work on next-generation CPU and AI-platform memory technologies.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →