Senior Design Verification Engineer (FPGA)

Location: Manila, Philippines. Full-time onsite position requiring satisfactory proof of the right to work in the Philippines.

Company

hirify.global develops low-cost, low-power programmable logic solutions, including FPGA, CPLD, and programmable power management devices.

What you will do

• Develop comprehensive verification plans, define clear metrics, and track progress throughout the project.
• Verify design blocks, subsystems, and full-chip SoCs using assertion-based, formal, directed, and randomized verification.
• Develop SystemVerilog and C-based testbenches in a UVM environment.
• Design Universal Verification Components, bus functional models, verification tools, and regression environments.
• Perform functional, RTL code, assertion, and gate-level coverage and simulations.
• Collaborate with design, IP, and software engineers to deliver high-quality SoC verification and establish verification best practices.

Requirements

• 6–10 years of digital design verification experience.
• Bachelor’s or master’s degree in Computer Science, Computer Engineering, Electronics Engineering, or Electrical Engineering.
• Experience with HDL/HVL languages and methodologies and the ASIC, FPGA, or SoC verification or development cycle.
• Experience with Cadence IES/Xcelium, Synopsys VCS, or Mentor Questa simulation tools.
• Hands-on experience with Python, Perl or shell scripting, TCL, and Make.
• Strong debugging, analytical, communication, and documentation skills, with the ability to work across groups and sites.

Culture & Benefits

• Work in an international organization focused on R&D, product innovation, and customer service.
• Participate in a fast-paced, results-oriented, team-first environment.
• Access a comprehensive compensation and benefits program.
• Work in an organization that values diversity of individuals, ideas, perspectives, and experience.