Sr Staff Digital Verification Engineer

Location: Shanghai, China; onsite only

Competitive benefits package alongside salary; compensation details provided during the hiring process.

Company

hirify.global is a global semiconductor company developing solutions for automotive, industrial, infrastructure, and IoT markets.

What you will do

• Understand the expected functionality of digital designs.
• Design and develop verification environments, test plans, and testbenches.
• Improve verification architecture and flows.
• Run RTL and gate-level simulations and regression testing.
• Develop, analyze, and close code and functional coverage.
• Debug designs and verification issues using assertions and industry-standard tools.

Requirements

• Bachelor’s or master’s degree in computer science or mechanical engineering.
• Minimum 8 years of relevant experience.
• Experience with SystemVerilog and UVM, including familiarity with UVM source code or key UVM mechanisms.
• Experience with verification test plans, testbenches, assertions, design debugging, code coverage, and industry-standard verification tools and flows.
• Basic knowledge of computer architecture, logic and circuit design, and strong problem-solving and communication skills.
• Ability to work independently and manage work effectively.

Nice to have

• Scripting and automation skills with Python.
• Familiarity with C, C++, Java, or another object-oriented programming language and software design patterns.
• Experience setting up verification environments exceeding 100,000 lines of code.
• Knowledge of DDR protocols and mixed-signal verification.

Culture & Benefits

• Regular, permanent employment with full-time onsite work.
• Work within a global organization operating across more than 30 countries.
• Collaborative culture based on transparency, agility, innovation, global collaboration, and entrepreneurship.
• Competitive benefits package provided alongside salary.
• Commitment to diversity, inclusion, and a non-discriminatory work environment.