Senior Principal Engineer - SoC/Chip Lead (Semiconductor)

Location: San Jose, California, USA; onsite only

Full-time regular employment (PERM).

Company

hirify.global is a global semiconductor solution provider developing MCUs, SoCs, analog and power products for automotive, industrial, infrastructure, and IoT markets.

What you will do

• Own technical leadership and execution of complex SoC programs from architecture through silicon production.
• Drive SoC planning, integration strategy, schedules, risk management, and tape-out readiness.
• Lead cross-functional work across digital design, verification, physical design, DFT, firmware, validation, packaging, and product engineering.
• Define chip-level architecture, integration requirements, performance targets, and power and area objectives.
• Integrate subsystems, IP, high-speed SerDes interfaces, analog front-end components, and mixed-signal technologies.
• Lead design reviews, silicon readiness assessments, issue resolution, post-silicon debug, and engineering mentorship.

Requirements

• Bachelor’s, master’s, or Ph.D. in electrical engineering, computer engineering, or a related discipline.
• 20+ years of semiconductor industry experience with substantial leadership responsibility.
• Experience as a Chip Lead, SoC Lead, Technical Program Lead, or in an equivalent role for large-scale ASIC or SoC products.
• Successful leadership of advanced-node SoCs, preferably using 3nm and/or 5nm technology nodes.
• Deep knowledge of SoC architecture, integration methodologies, full-chip development flows, RTL design, verification, physical design, DFT, static timing analysis, low-power design, silicon bring-up, and productization.
• Experience managing complex schedules, technical dependencies, and cross-functional execution across global teams.

Nice to have

• Experience with high-performance switching silicon, NoC architectures, data-movement fabrics, high-bandwidth memory-centric systems, or chiplet-based architectures.
• Knowledge of high-bandwidth and low-latency interconnects, packaging technologies, and signal integrity for high-speed systems.
• Experience in AI, HPC, networking, connectivity, data-center, or memory infrastructure products.
• Exposure to UALink, Ethernet switching, switch fabrics, or similar high-performance interconnect technologies.

Culture & Benefits

• Work within a global organization operating across more than 30 countries.
• Culture centered on being Transparent, Agile, Global, Innovative, and Entrepreneurial.
• Competitive benefits package provided alongside salary.
• Commitment to diversity, inclusion, and an environment free from discrimination.