Principal Engineer, Serdes Analog Design

Location: Onsite at the San Jose office 5 days a week

Salary: $219,000–$351,000 USD per year, plus incentive opportunities.

Company

hirify.global develops memory, system LSI, LCD, 5G, SoC, semiconductor, and display technologies for smartphones, electric vehicles, hyperscale data centers, IoT devices, and other applications.

What you will do

• Define architectures and circuits for high-speed SerDes projects and IPs.
• Design low-power, low-voltage analog and custom digital circuits using advanced CMOS processes.
• Translate component specifications into schematics and build simulation test benches.
• Evaluate circuit performance, functionality, power consumption, and reliability.
• Supervise designers and the complete project layout through silicon validation and debugging.
• Optimize layouts to improve circuit performance and power consumption.

Requirements

• 15+ years of experience with a PhD, 18+ years with a Master’s degree, or 20+ years with a Bachelor’s degree.
• At least 7 years of analog or SerDes SoC design experience.
• Experience with analog and mixed-signal circuits, including bandgaps, LDOs, and filters.
• Experience with SerDes IP circuits such as CTLE, DFE, FFE, clock distribution, PI, and IQ generation.
• Knowledge of SerDes architecture and high-speed interconnect standards including USB, PCIe, and UCIe.
• Proficiency with Cadence, Spectre, Totem, EMX, and scripting languages such as Python or Matlab.

Nice to have

• Experience with ESD, PLLs, clock generation, ADCs, and DACs.

Culture & Benefits

• Inclusive, collaborative environment focused on learning, growth, and diverse perspectives.
• Medical, dental, vision, and 401(k) benefits.
• More than four weeks of paid time off, holidays, and sick leave.
• Family support programs, including fertility and adoption assistance.
• Emotional wellness resources, onsite café and gym, virtual fitness classes, and a flexible work environment.
• Charitable giving match and community involvement opportunities.