5 дней назад
Principal Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU (RISC-V)
219 000 - 351 000$
Мэтч & Сопровод
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Описание вакансии
Текст:
TL;DR
Principal Engineer, Architecture & Performance Research Engineer for Data Center and Agentic AI CPU (RISC-V): Defining next-generation CPU architectural vision and performance direction for data center and agentic AI workloads with an accent on microarchitectural research, performance modeling, and CPU-memory co-design. Focus on translating workload analysis into RTL and silicon-validated designs, evaluating system-level trade-offs, and developing AI-driven architecture exploration methodologies.
Location: Daily onsite presence at the San Jose office, United States
Base pay range: $219,000–$351,000 USD per year, plus incentive opportunities
Company
develops technology solutions for smartphones, electric vehicles, hyperscale data centers, IoT devices, and other computing applications.
What you will do
- Define the architectural vision and performance direction for next-generation RISC-V CPU platforms.
- Research microarchitecture and performance for data center, agentic AI, and memory-centric workloads.
- Lead workload characterization, quantitative performance analysis, architectural simulation, and RTL evaluation.
- Translate architectural concepts into implementable designs and validate them through RTL and silicon.
- Align architecture with design teams and influence technical decisions across multiple CPU generations.
- Mentor senior and staff engineers and drive research contributions leading to patents and publications.
Requirements
- Master’s degree in Computer Engineering, Computer Science, or a related field with 18+ years of relevant experience, or a PhD with 15+ years of relevant experience.
- 8+ years of experience in CPU microarchitecture, architecture research, or performance engineering.
- Experience designing and evaluating high-performance CPU architectures, including RISC-V, ARM, or x86.
- Expertise in at least one major microarchitectural domain: front-end, mid-end, or back-end CPU architecture.
- Hands-on experience with architectural simulators and performance models such as gem5.
- Strong programming skills in C/C++ and Python, plus experience taking concepts through RTL implementation and silicon validation.
Nice to have
- Experience with AI/ML, agentic AI, or data center workloads and AI-driven architecture or RTL methodologies.
- Knowledge of memory-centric architectures, CPU-memory co-design, and system-level performance, power, area, and implementation trade-offs.
- Experience with tape-out, silicon validation, cross-functional architecture initiatives, patents, publications, or deployed products.
Culture & Benefits
- Inclusive and diverse workplace focused on innovation, curiosity, resilience, and collaboration.
- Medical, dental, vision, and 401(k) benefits.
- 4+ weeks of paid time off annually, plus holidays and sick leave.
- Family support benefits, emotional wellness resources, charitable giving match, and fitness programs.
- Onsite café and gym, virtual classes, and a flexible work environment within the onsite role policy.
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