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15 часов назад

NAND Array Engineer (3D NAND)

139 520 - 255 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
NAND Array Engineer (3D NAND): Characterizing NAND memory cell and array erase, program, and read operations while developing trims for next-generation memory products with an accent on device physics, reliability, and data analysis. Focus on optimizing Read Window Budget and Raw Bit Error Rate, building predictive models, and driving wafer-level reliability experiments and production yield improvements.

Location: Hybrid role based in Rancho Cordova, California, or San Jose, California, United States

Salary: USD 139,520–255,000 yearly, plus eligibility for RSU, RCU, and cash bonus programs.

Company

hirify.global is a global memory technology company developing 3D NAND products and optimized data storage solutions.

What you will do

  • Design, plan, and execute NAND memory cell and array characterization experiments for performance and reliability.
  • Develop and optimize trims to improve Read Window Budget and Raw Bit Error Rate.
  • Apply NAND device physics to interpret experimental data and trim parameter relationships.
  • Collaborate with Device, Design, Reliability, Product, and Test Engineering teams on bench experiments.
  • Interface with wafer fabrication teams on Sort and Wafer-Level Reliability design-of-experiments.
  • Analyze data, build predictive models, maintain degradation scorecards, and release improvements to production flows.

Requirements

  • Master’s or PhD in Electrical Engineering, Microelectronics, or a closely related field.
  • 3+ years of industry experience with semiconductor memory technologies and products.
  • Strong understanding of NAND cell and array operations, reliability mechanisms, characterization techniques, semiconductor device physics, and process flows.
  • Proficiency in statistical analysis methodologies and tools.
  • Hands-on programming experience in C, C++, Python, and/or JMP.
  • Strong analytical, problem-solving, communication, and cross-functional collaboration skills.

Nice to have

  • Experience with 3D NAND architecture and advanced memory scaling challenges.
  • Familiarity with wafer fabrication processes and Sort/WLR test methodologies.
  • Experience releasing trims or process improvements to high-volume manufacturing.
  • Experience with machine learning or advanced modeling techniques for semiconductor data.

Culture & Benefits

  • Medical, dental, vision, supplemental life, AD&D, short-term disability, and long-term disability insurance.
  • Healthcare and dependent care flexible spending accounts.
  • Company match on eligible 401(k) plan contributions.
  • Inclusive, collaborative, customer-inspired, and results-driven work environment.

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