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4 дня назад

Senior Verification Engineer (Automotive)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Senior Verification Engineer (Automotive Digital IP): Defining verification plans and developing SystemVerilog/UVM testbenches for digital IP used in secure, connected, and autonomous vehicles with an accent on constrained-random stimulus, functional coverage, assertions, and formal verification. Focus on debugging complex RTL failures, root-cause analysis, advanced protocol verification, and mentoring verification engineers.

Location: Austin (Oakhill), United States; office-based

Company

hirify.global develops digital IP and semiconductor technologies for automotive and advanced microcontroller businesses, supporting secure connected and autonomous vehicles.

What you will do

  • Define and execute verification plans for digital IP.
  • Develop verification testbenches, including drivers, monitors, scoreboards, and advanced UVM VIPs.
  • Create directed and constrained-random stimulus and functional coverage models.
  • Analyze RTL, functional coverage, assertion coverage, and simulation results.
  • Develop and maintain SystemVerilog assertions and apply formal verification methodologies.
  • Provide technical leadership, debug failures through root-cause analysis, and mentor a small engineering team.

Requirements

  • Onsite work in Austin, United States.
  • BSEE with 5+ years of semiconductor industry experience, MSEE with 3+ years, or PhD with 1+ years of experience.
  • Strong expertise in Verilog and SystemVerilog.
  • Experience with OVM/UVM and class-based verification methodologies.
  • Experience with formal verification, functional and code coverage, and test pattern debugging.
  • Knowledge of DDR, PCIe, or AMBA protocols, plus scripting with Python, Perl, and UNIX/Linux.

Nice to have

  • Knowledge of VHDL.
  • Familiarity with major simulation and debug tools.
  • Experience using AI/LLM-based approaches to improve engineering efficiency.

Culture & Benefits

  • Zero-defect quality mindset across the verification team.
  • Technical leadership and mentoring responsibilities.
  • Equal opportunity employment and reasonable accommodations for qualified individuals with disabilities.

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