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9 часов назад

Sr Principal Design Engineer (Verilog/SystemVerilog)

154 000 - 286 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Sr Principal Design Engineer (Verilog/SystemVerilog): Designing, verifying, and supporting system-level memory IP models for hardware-based verification platforms with an accent on RTL design, memory protocols, and customer-ready product quality. Focus on developing reusable models for LPDDR, HBM, NAND Flash, eMMC, SD, DFI, and UFS, debugging complex protocol and system issues, and improving verification methodologies.

Location: San Jose, California, United States

Annual salary: $154,000–$286,000, plus potential bonus, equity, and benefits.

Company

hirify.global develops technology and hardware-based verification products for the semiconductor and electronic design industry.

What you will do

  • Design, develop, verify, and productize system-level memory IP models for hardware-based verification platforms.
  • Build memory models supporting LPDDR, HBM, NAND Flash, eMMC, SD Card, DFI, and UFS interfaces.
  • Maintain, enhance, debug, and support memory IP products throughout their lifecycle.
  • Develop high-quality Verilog/SystemVerilog RTL and execute verification strategies using simulation and emulation tools.
  • Diagnose complex RTL, protocol, system, and customer issues through debugging and root-cause analysis.
  • Document memory IP specifications, user guidance, and product support materials while managing schedules and deliverables.

Requirements

  • MSEE or equivalent advanced degree and at least 5 years of significant experience designing complex protocols, RTL, or hardware systems.
  • Extensive hands-on experience with Verilog/SystemVerilog RTL design.
  • Strong knowledge of RTL verification methodologies, tools, and flows.
  • Demonstrated ability to debug complex hardware, RTL, protocol, and system-level issues.
  • Excellent written and verbal communication skills in English.
  • Strong analytical, organizational, planning, collaboration, and problem-solving skills.

Nice to have

  • Experience with hirify.global simulation or emulation products and hardware-based verification platforms.
  • Programming or scripting experience with Perl, Tcl/Tk, C-shell, or similar languages.
  • Experience with memory subsystem architecture and protocols such as LPDDR, HBM, NAND Flash, eMMC, SD, DFI, or UFS.
  • Experience developing reusable IP models or verification components for complex SoC or system-level environments.

Culture & Benefits

  • Highly collaborative individual-contributor role working with engineering, product, and customer-facing teams.
  • Opportunity to contribute to engineering lifecycle processes, verification methodologies, and quality practices.
  • Paid vacation and holidays.
  • 401(k) plan with employer match and employee stock purchase plan.
  • Medical, dental, and vision plan options, with potential bonus and equity compensation.

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