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7 дней назад

Staff Digital Design Engineer (NAND Flash)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
SK
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Staff Digital Design Engineer (NAND Flash): Designing and delivering digital logic for 3D NAND Flash memory, covering microarchitecture, RTL design, verification, synthesis, and timing closure with an accent on power, performance, area, and scalability. Focus on chip-level integration, the complete RTL-to-GDSII flow, post-silicon debug, and technical guidance for junior engineers.

Location: Seoul, Republic of Korea; onsite at the Seoul Office

Company

hirify.global develops Flash memory and advanced memory technology products supported by large-scale manufacturing capabilities and global operations.

What you will do

  • Lead and deliver digital design projects for 3D NAND Flash memory.
  • Develop and verify RTL in Verilog, including linting, clock domain crossing analysis, and design integration.
  • Perform synthesis, DFT, timing analysis, and timing closure while balancing power, performance, area, modularity, and scalability.
  • Define technical specifications and features with internal teams, external teams, and customers.
  • Support post-silicon evaluation, debugging, and productization across functions.
  • Provide technical guidance and mentoring to junior engineers.

Requirements

  • MSEE and 6–8 years of relevant experience.
  • Experience with chip-level integration, chip leadership, and the full logic-design product lifecycle from requirements through testing.
  • Working knowledge of the complete RTL-to-GDSII flow, including simulation, synthesis, static timing analysis, logic equivalence, DFT insertion, place-and-route, clock tree synthesis, extraction, and physical verification.
  • Knowledge of NAND Flash memory cell operations and program, read, and erase algorithms.
  • Strong written and verbal communication, interpersonal skills, troubleshooting ability, teamwork, and deadline management.

Nice to have

  • Experience designing digital circuits for low-power operation and knowledge of device physics and semiconductor processes.
  • Knowledge of NAND Flash analog, core, datapath, and I/O circuits.
  • Experience with Synopsys or Cadence tools for synthesis, static timing, and place-and-route.
  • Familiarity with revision control, Liberty timing models, and SDC constraints.
  • Programming experience in C, C++, Python, or Perl.

Culture & Benefits

  • Entrepreneurial, fast-paced work environment within the Memory Technology organization.
  • Collaborative work across engineering teams and with external partners and customers.
  • Opportunity to contribute to advanced 3D memory technology and innovation.
  • Inclusive environment focused on diversity, belonging, respect, and contribution.

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