RTL Design Engineer

Location: On-site in Hillsboro, Oregon, United States

Annual salary: $91,150–$128,690 USD

Company

hirify.global develops processors and computing technologies for devices, applications, and systems worldwide.

What you will do

• Design and implement CPU features using register-transfer-level coding.
• Develop RTL simulations for CPU IP blocks and support full-chip integration.
• Optimize logic designs for power, performance, area, and timing goals.
• Collaborate on CPU architectural and microarchitectural feature definition.
• Review verification plans and resolve failing RTL tests.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with at least 3 months of educational or work experience, or a relevant master’s degree.
• At least 3 months of experience with RTL design using SystemVerilog.
• At least 3 months of experience with CPU architecture fundamentals and digital design principles.
• Work on-site in Hillsboro, Oregon, United States.
• Immigration sponsorship is not available for this position.

Nice to have

• Familiarity with microarchitecture fundamentals and logic design optimization.
• Familiarity with timing analysis, timing closure, and digital design performance optimization.

Culture & Benefits

• Collaborative work across teams and disciplines.
• Opportunities to learn from experienced CPU and semiconductor engineers.
• Health, retirement, vacation, competitive pay, and stock bonus programs.
• Focus on innovation, continuous learning, inclusion, and technical excellence.