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Quantum Cryo CMOS Design Enablement, Member of Technical Staff

98 000 - 176 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Quantum Cryo CMOS Design Enablement, Member of Technical Staff (Cryogenic CMOS/PDK): Developing cryogenic CMOS process design kits, device models, test structures, characterization plans, and EDA design flows for quantum and cryogenic technologies with an accent on silicon-data correlation, model validation, and low-temperature device behavior. Focus on analyzing variability, integrating models into EDA environments, designing test chips, and translating device and process innovations into manufacturable design collateral.

Location: Malta, New York, USA

Salary: $98,000–$176,000 per year

Company

hirify.global is a semiconductor foundry providing design, development, and fabrication services with a global manufacturing footprint.

What you will do

  • Develop cryogenic CMOS PDKs, including compact models, parameter extraction, and validation across temperature regimes.
  • Correlate silicon data, simulations, and model behavior to improve predictive accuracy.
  • Plan and execute electrical characterization of cryogenic CMOS devices and circuits.
  • Design test structures, test sites, and test chips for model extraction and silicon validation.
  • Analyze characterization data to identify trends, variability, and opportunities to improve models and design rules.
  • Deploy design flows, model integrations, and PDK deliverables in EDA environments while collaborating with EDA vendors and cross-functional engineering teams.

Requirements

  • BS or MS in Electrical Engineering, Physics, Applied Physics, or a related field.
  • 5+ years of professional experience.
  • Experience with device modeling, device characterization, or test structures.
  • Familiarity with electrical characterization techniques and data analysis.
  • Experience with EDA tools and semiconductor design flows.
  • Strong analytical, problem-solving, and communication skills.

Nice to have

  • Experience with cryogenic electronics or low-temperature device behavior.
  • Exposure to PDK development, compact model implementation, variability modeling, or statistical data analysis.
  • Experience designing test chips or supporting silicon validation activities.
  • Experience working with EDA vendors or quantum computing hardware.

Culture & Benefits

  • Full-time employment within a global semiconductor foundry.
  • Equal opportunity workplace committed to cultural diversity.
  • Reasonable accommodation is available during the employment process.
  • Employment is subject to applicable pre-employment conditions, laws, and regulations.

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