обновлено 11 дней назад
FPGA Engineer (Space)
140 500 - 221 500$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
FPGA Engineer (Space) (FPGA/Signal Processing): Designing and delivering high-speed signal-processing algorithms, cryptography, and network protocols for FPGA-based satellite communications systems with an accent on RTL development, hardware integration, and timing closure. Focus on implementing reusable digital systems, developing and testing signal-processing blocks, and debugging designs in the lab.
Location: Tempe, Arizona, United States. US citizenship required. The role includes travel of up to 10%.
Salary: $140,500–$221,500 annually. For specific work locations in San Jose, the San Francisco Bay Area, and the New York City metropolitan area: $174,000–$261,000 annually.
Company
develops communication services and systems for consumers, businesses, governments, and military customers worldwide.
What you will do
- Own the architecture, design, implementation, and delivery of FPGA-based digital systems.
- Develop RTL in Verilog, SystemVerilog, and VHDL for control, data processing, and communication functions.
- Integrate and deploy designs on FPGA and FPGA SoC platforms, including simulation, place and route, hardware testing, and system integration.
- Develop high-speed digital signal-processing and waveform-processing algorithms for satellite communications.
- Define timing constraints, analyze timing results, close timing, and debug designs in the lab using logic analyzers, oscilloscopes, and other instrumentation.
- Lead or participate in trade studies, design and code reviews, documentation, validation, production support, and improvements to FPGA development practices.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
- 6+ years of FPGA design experience, including Xilinx Vivado.
- Strong knowledge of SystemVerilog and/or VHDL, digital logic, timing considerations, RTL design, simulation, and testbench development.
- Experience designing signal-processing blocks such as equalizers, correlators, filters, and FEC encoders and decoders.
- Experience with programmable-logic EDA tools, lab instrumentation, schematics, and collaboration with hardware design teams.
- US citizenship is required.
Nice to have
- MSEE degree.
- Experience with TCL, Perl, Python, or another scripting language; SERDES, DDR2/3/4, and LVDS interfaces.
- SystemVerilog verification, UVM, RTL optimization, Linux development environments, GitHub, Matlab, and CI/CD.
- Familiarity with AI agents, troubleshooting, and satellite communication waveforms and standards.
Culture & Benefits
- Collaborative work across multiple engineering disciplines and team sizes.
- Autonomous work on well-defined problems with limited instruction.
- Medical, financial, and other benefits may be included depending on the position.
- Additional cash or stock incentives may be available.
- Equal-opportunity workplace with accommodation support for applicants with disabilities.
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