1 час назад
SMTS Technology Development (RF/Analog Layout)
118 000 - 210 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
SMTS Technology Development (RF/Analog Layout): Developing high-performance RF/analog integrated device test structures, circuits, and manufacturable layouts to enable new semiconductor technology nodes with an accent on CMOS layout design, design-rule validation, and PDK enablement. Focus on creating and modifying layouts, writing automation scripts, coordinating cross-functional technology development, and leading qualification test-chip delivery.
Location: Essex Junction, United States
Salary: $118,000–$210,000 per year
Company
is a semiconductor foundry providing chip design, development, and fabrication services with manufacturing operations across three continents.
What you will do
- Lead the physical implementation of high-performance RF and analog integrated-device test structures, circuits, and support layouts.
- Enable new technology nodes, process stacks, test structures, and PDKs for future RF communications.
- Create new layouts, modify existing layouts, and develop automation scripts for layout productivity.
- Collaborate with device and process teams to define and validate design rules and layout methodologies.
- Deliver qualification test chips on schedule while coordinating multiple teams and managing project costs.
- Train junior engineers and lead small teams or medium-sized technical projects when required.
Requirements
- Technical university degree: BS with 8–10 years of experience, MS with 7 or more years, or PhD with 5 or more years.
- Hands-on expertise in CMOS layout design and RF/analog layout.
- Experience with Cadence Virtuoso and SKILL programming.
- Strong knowledge of foundry design rules, including the ability to reason about and compact designs when needed.
- Experience leading technical or project activities, mentoring engineers, and working with cross-functional teams.
- The role may require obtaining a U.S. Department of Defense Security Clearance; eligibility will be assessed through citizenship and background questions.
Culture & Benefits
- Work across engineering, device, process, and other organizational teams to accelerate technology introduction and ramp.
- Participate in strategically important projects and cross-functional initiatives across sites.
- Coach and mentor less experienced staff while influencing technical direction.
- Potential involvement in patents, conference committees, journal publications, external programs, and supplier or consortium projects.
- Reasonable accommodations are available during the employment process.
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