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1 день назад

Principal Engineer Signal Integrity Power Integrity

153 000 - 296 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Текст:
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TL;DR
Principal Engineer Signal Integrity Power Integrity (Semiconductor Electrical Architecture): Leading signal integrity and power integrity strategy for custom silicon products across die, package, and board domains with an accent on high-speed interfaces, power delivery networks, and advanced packaging. Focus on defining electrical architectures, driving SI/PI simulations and signoff, leading validation and silicon bring-up, and resolving complex system-level performance issues.

Location: Richardson, Texas, USA; onsite

Salary: $153,000–$296,000 per year, depending on qualifications, experience, and location.

Company

hirify.global is a semiconductor foundry providing design, development, and fabrication services with a global manufacturing footprint.

What you will do

  • Lead signal integrity and power integrity strategy for custom silicon products serving industrial, automotive, AI, networking, and other applications.
  • Define electrical architectures and system-level requirements for package power delivery networks, high-speed interfaces, board topologies, and channel implementations.
  • Drive die-package-board co-design, including I/O planning, bump assignment, floorplan optimization, package routing, board stackup definition, and power delivery implementation.
  • Lead SI, PI, electromagnetic, channel compliance, and electrical performance simulations across die, package, and board environments.
  • Define validation and characterization strategies, support compliance testing and silicon bring-up, and lead electrical root-cause analysis.
  • Mentor engineers and lead technical alignment with customers, package and PCB vendors, OSAT partners, foundries, and ecosystem suppliers.

Requirements

  • Master’s degree or higher in Electrical Engineering, Computer Engineering, Applied Physics, Electromagnetics, or a related field.
  • At least 10 years of relevant semiconductor experience and at least 5 years leading SI/PI activities for complex SoCs, ASICs, high-speed interfaces, HPC platforms, or heterogeneous systems.
  • Strong knowledge of PCIe, Ethernet, DDR/LPDDR, SerDes, UCIe, USB, MIPI, networking, AI, and automotive platforms.
  • Experience with package and board simulation tools such as Cadence Sigrity, Cadence Clarity, Ansys HFSS, SIwave, Q3D, and Synopsys tools.
  • Strong understanding of Flip-Chip, FCBGA, WLCSP, wire-bond, interposers, chiplets, 2.5D/3D integration, manufacturing flows, yield, and reliability standards.
  • Excellent communication and documentation skills for architecture specifications, design methodologies, validation plans, and customer-facing technical documentation.

Nice to have

  • Experience with ASIC or SoC development for networking, AI/ML, datacenter, automotive, mixed-signal, or HPC products.
  • Experience driving package vendors, PCB vendors, OSAT partners, foundries, and ecosystem suppliers.
  • Industry standards contributions, technical conferences, patents, publications, or recognized technical leadership.
  • Experience with HBM-based systems, heterogeneous integration, advanced packaging roadmaps, and next-generation high-bandwidth interconnects.
  • Experience deploying enterprise-wide SI/PI methodologies, electrical signoff flows, and best practices.

Culture & Benefits

  • Work in global, cross-disciplinary teams with customers, partners, foundries, and suppliers.
  • Inclusive and diverse workplace with equal employment opportunity.
  • Employment is subject to applicable pre-employment conditions and background checks.
  • Reasonable accommodations are available during the employment process.

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