Senior Digital Verification Engineer

Location: Chengdu, China

Company

hirify.global develops integrated power semiconductors and power delivery architectures for portable and non-portable electronics, automotive, telecommunications, and networking applications.

What you will do

• Develop test plans from design requirements and product datasheets for digital and mixed-signal ICs.
• Collaborate with digital and analog designers on system-level and behavioral models.
• Create digital verification environments using SystemVerilog and UVM.
• Write digital and mixed-signal testcases, assertions, and checkers.
• Analyze simulation results, code coverage, and functional coverage; debug issues and perform gate-level verification.
• Develop verification IP, reusable test environments, standard tests, automation, and scripting solutions.

Requirements

• Master’s degree in Electrical Engineering and 5+ years of experience verifying digital or mixed-signal ASIC designs.
• Strong knowledge of the ASIC development process and digital design techniques.
• Strong proficiency in SystemVerilog, UVM, behavioral coding, and RTL coding.
• Experience with digital simulators, coverage analysis tools, formal verification tools, and standard ASIC workflows.
• Ability to execute verification tasks according to design specifications and project milestones.
• Good written and verbal communication skills with strong collaboration abilities.

Nice to have

• Knowledge of power management applications and products such as switching regulators, sensors, motor control, display drivers, and power management ICs.
• Experience with I2C, I3C, SPI, USB, PMBUS, OTP/MTP, Buck, or Boost technologies.
• Experience with scripting and automation languages such as TCL and Python.

Culture & Benefits

• Work in a semiconductor company focused on creativity, sustainability, leading-edge products, and innovation.
• Collaborate across digital and analog design teams.
• Equal opportunity employment and a commitment to workplace diversity.