FPGA Engineer (Fintech)

Location: Dublin, Ireland (onsite)

Company

hirify.global is a financial firm and market maker that develops technology for liquidity provision and electronic trading across global markets.

What you will do

• Design FPGA and ASIC solutions for ultra-low-latency market-making infrastructure.
• Work across the full hardware design lifecycle, including architecture, RTL implementation, simulation, verification, and hardware bring-up.
• Develop solutions for real trading and quantitative engineering problems where every nanosecond matters.
• Complete project work with guidance from experienced engineers and several senior mentors.
• Participate in ongoing technical training and a company-curated global intern training week.

Requirements

• Academic background in Electrical or Computer Engineering.
• Experience with Hardware Description Languages, including SystemVerilog or Verilog.
• Experience with FPGA vendor tools such as Vivado or Quartus.
• Programming experience with Python, C++, or a similar language.
• Strong problem-solving and communication skills, with an interest in FPGA and ASIC applications for low-latency trading.
• Graduation year: 2028; the 10-week programme runs from 21 June 2027 to 27 August 2027.

Culture & Benefits

• Mentorship from experienced engineers throughout the internship.
• Daily catered lunches and a fully stocked kitchen.
• On-site gym, workout classes, games room, social events, and laundry service.
• Opportunities to learn about financial markets through real engineering projects.

Hiring process

• Initial resume screening.
• Online programming test delivered through HackerRank.
• Further steps arranged after the test review.