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7 дней назад

3D Integration Engineer (Quantum Computing)

60 000 - 78 000
Формат работы
onsite
Тип работы
fulltime
Английский
b2
Страна
France
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
3D Integration Engineer (Quantum Computing): Developing advanced 2.5D and 3D packaging and heterogeneous-integration technologies for scalable quantum-computing hardware with an accent on interconnect design, signal integrity, thermal performance, and fabrication processes. Focus on designing interposers, TSVs, micro-bumps, hybrid bonds, and chiplet interfaces, performing multiphysics simulations, and validating fabricated devices through experimental measurements.

Location: Paris, France — On-site

Salary: €60,000–€78,000 yearly base salary

Company

hirify.global is a Paris-based quantum-computing startup developing carbon-nanotube-based quantum processors and scalable, fault-tolerant quantum-computing hardware.

What you will do

  • Develop 2.5D and 3D integration architectures for quantum processors and supporting electronics.
  • Design interposers, through-silicon vias, micro-bumps, hybrid bonds, redistribution layers, and chiplet interfaces.
  • Integrate quantum processing units with cryogenic CMOS, RF/microwave circuitry, photonics, MEMS, and packaging substrates.
  • Perform electrical, electromagnetic, mechanical, and thermal simulations.
  • Define fabrication flows and design rules with foundries, packaging partners, and internal process teams.
  • Develop test vehicles, measure fabricated devices, analyze experimental data, and document qualification results and technology roadmaps.

Requirements

  • Bachelor’s or Master’s degree in electrical engineering, materials science, mechanical engineering, applied physics, or a related discipline.
  • Experience with semiconductor packaging, wafer-level integration, MEMS, microfabrication, or heterogeneous integration.
  • Familiarity with wafer bonding, hybrid bonding, TSVs, flip-chip assembly, thin-film deposition, lithography, etching, electroplating, or CMP.
  • Knowledge of package-level electrical, thermal, and mechanical design.
  • Experience with CAD, electromagnetic or multiphysics simulation, statistical analysis, or semiconductor process-development tools.
  • Strong experimental, troubleshooting, documentation, and cross-functional communication skills.

Nice to have

  • PhD or equivalent industry experience in advanced packaging or semiconductor integration.
  • Experience with superconducting, semiconductor-spin, trapped-ion, neutral-atom, or photonic quantum-computing platforms.
  • Experience with RF/microwave interconnects, photonic coupling, or high-density chiplet systems.
  • Experience transferring packaging or integration processes into pilot or volume manufacturing.

Culture & Benefits

  • Stock options for every employee.
  • Sponsored conference travel, Swile meal vouchers, mental health support, and a training budget.
  • Sabbatical leave after two years.
  • International, multidisciplinary scientific environment with office spaces in central Paris, team lunches, and offsite events.

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