ASIC Design Engineer Intern (AI)

Location: US Headquarters

Company

Develops AI vision processors for edge applications that extract data from high-resolution video streams.

What you will do

• Design and implement video compression, image processing, vector processing, neural network accelerator, and processor core logic.
• Develop and verify RTL using Verilog and SystemVerilog.
• Synthesize and optimize RTL for timing, area, and power.
• Build unit-level and cluster-level testbenches, BFMs, random test generators, and functional coverage monitors.
• Create test plans and random or directed test cases, then perform logic verification and coverage analysis.
• Develop front-end methodologies and tool flows and participate in chip bring-up and testing.

Requirements

• Master’s degree in Electrical, Electronics, or Computer Engineering.
• 0–5 years of experience.
• Understanding of computer architecture, logic design, and VLSI design.
• Knowledge of SystemVerilog, Verilog, Perl, design verification, and functional coverage.
• Ability to program in scripting languages and write assembly language programs.
• Knowledge of logic synthesis and timing closure, plus strong communication and teamwork skills.

Culture & Benefits

• Full-time employment.
• Work focused on edge AI vision processor development and chip-level engineering.