aiqa automationsignal integrityspicememory compilersem ir analysistransistor level simulationmemory verification
Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Текст:
Hirify AI/Оригинал
TL;DR
Foundation IP Memory Verification Engineer (AI): Validating custom memory macros and memory compilers for AI products with an accent on transistor-level simulation, signal integrity, EM/IR analysis, and timing and power model accuracy. Focus on automating verification flows, diagnosing design discrepancies and characterization gaps, and correlating silicon behavior with SPICE models.
Location: Singapore-Yishun
Company
hirify.global's Central Engineering Group develops foundation IP for AI products, including memory compilers, logic cells, and custom macros.
What you will do
Contribute to memory design validation for custom memory macros and memory compilers.
Perform functional verification, investigate root causes of design discrepancies, and help resolve them.
Analyze signal integrity, EM/IR effects, reliability, timing, internal margins, power-up, and lock-up behavior through transistor-level simulations.
Perform QA and validation checks to ensure accurate timing and power models, including identifying timing characterization gaps.
Develop scripts to automate verification flows and data analysis.
Support silicon debugging and SPICE-model correlation while collaborating with memory designers, modeling leads, design leads, and managers on validation plans and flows.
Requirements
Bachelor's degree in Electronics or Computer Engineering.
Minimum 5 years of memory-circuit-related experience.
Good understanding of transistor-level circuit behavior and device physics.
Good understanding of signal integrity analysis, EM/IR analysis, and reliability analysis.
Proficiency in running simulators, writing automation scripts, and using engineering tools.
Good communication, interpersonal, and leadership skills.
Motivation, self-direction, multitasking ability, passion for solving complex problems, and willingness to learn.
Nice to have
Understanding of memory behavioral and physical models.
Expertise in memory circuit design.
Understanding of DFT schemes and chip-level integration.
Culture & Benefits
Full-time position within the Central Engineering Group.
Work on foundation IP for AI products and bleeding-edge process technology.
Equal opportunity employment practices are stated.
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