Senior Engineer - Analog Design

Location: Ottawa, Ontario, Canada

Annual base salary: CAD 90,000–140,000, plus restricted stock units and quarterly bonus payments.

Company

hirify.global develops semiconductor products and technology solutions used in timing, communication, and other real-world applications.

What you will do

• Design and simulate analog IP blocks for mixed-signal SoC products.
• Translate circuit requirements into production-ready designs with design leads.
• Perform PVT corner analysis and block-level modeling.
• Support silicon validation, bring-up, and lab characterization.

Requirements

• PhD or master's degree in electrical engineering; relevant new PhD graduates are welcome to apply.
• Approximately 3–5 years of professional experience in analog or mixed-signal IC design.
• Experience with PLLs/DLLs, ADCs/DACs, filters, or high-speed I/O circuits.
• Strong analog fundamentals and experience with Cadence IC design tools.
• Senior individual-contributor scope; the role does not include principal-level or system-architecture ownership.

Nice to have

• Research directly applicable to practical analog design.
• Verilog-A modeling experience.
• Scripting or automation experience with Skill, Python, Perl, or Tcl.
• Silicon bring-up or laboratory validation experience.

Culture & Benefits

• Full-time position with health benefits beginning on day one.
• Retirement savings plans and an employee stock purchase program with a six-month look-back feature.
• Employee development programs and leadership growth opportunities.
• Expected travel: 0–25%.
• Accessibility accommodations are available throughout the hiring process in accordance with Ontario legislation.