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2 часа назад

Member of Technical Staff, Hardware, Performance Engineer (AI Accelerators)

200 000 - 420 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Member of Technical Staff, Hardware, Performance Engineer (AI Accelerators): Architecting, modeling, and correlating custom AI accelerator silicon and SoC systems with an accent on high-fidelity simulation, workload characterization, and hardware/software co-design. Focus on developing C++/SystemC performance models, exploring micro-architectural tradeoffs, optimizing ISA and kernels, and validating model accuracy against RTL and pre-silicon emulators.

Location: Based in Austin, Texas or Palo Alto, California

Annual salary: $200,000–$420,000 USD

Company

hirify.global is building personal AI through local-inference hardware, custom training infrastructure, next-generation user interfaces, and deep learning research.

What you will do

  • Design and implement high-performance and functional hardware models using C++ and/or SystemC.
  • Run micro-architectural studies covering cache sizes, branch predictors, pipeline depths, scatter/gather, and matrix multiplication shaping.
  • Profile AI kernels and software stacks to create representative traces for hardware-model stress testing.
  • Collaborate with compiler, IR, kernel, software, and RTL design teams on hardware/software co-design.
  • Correlate performance models with RTL and pre-silicon emulators.
  • Identify system bottlenecks involving instruction-level parallelism, bandwidth, and utilization.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science and 5+ years of practical industry experience with advanced process nodes of 7nm or below.
  • Expert proficiency in C/C++ or event-driven simulation environments such as SystemC.
  • Experience with compiler transformations in LLVM, GCC, or XLA and with CUDA or Triton kernels interacting with an ISA.
  • Expert knowledge of computer architecture for at least one chip type, including SoCs, CPUs, GPUs, or AI accelerators.
  • Experience using performance counters, hardware profilers, and trace-analysis tools.
  • Collaborative experience in hardware/software co-design.

Nice to have

  • Pre-silicon RTL/emulator or post-silicon performance-validation experience.
  • Experience with QEMU models for pre-silicon software development.
  • Scripting for data post-processing, simulation-result visualization, and large regression-suite automation.

Culture & Benefits

  • Visa sponsorship is available, with support through the visa process where appropriate.
  • Relocation support is available as needed.
  • Health, dental, and vision benefits.
  • Unlimited paid time off.

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