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Digital - Digital Design Engineer (title will reflect experience)

Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US/Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Digital - Digital Design Engineer (Ethernet/Chiplet): Developing micro-architecture specifications, RTL designs, and Ethernet PCS/PMA IPs for high-speed chiplet-based systems with an accent on SystemVerilog, IEEE 802.3 compliance, and power, area, and performance optimization. Focus on designing 100/200/400/800G data-path logic, integrating mixed-signal IP, taking RTL through synthesis, and supporting physical implementation.

Location: On-site in the Bay Area, Vancouver, or Toronto; Monday to Friday on-site work is required.

Company

hirify.global is an early-stage chiplet startup developing technologies for high-volume, high-performance, manufacturable chiplet-based systems.

What you will do

  • Design, develop, and integrate Ethernet PCS/PMA IPs for 100/200/400/800G data rates.
  • Develop micro-architecture specifications and implement digital designs using SystemVerilog.
  • Ensure compliance with IEEE 802.3 Ethernet standards and optimize designs for power, area, and performance.
  • Collaborate with verification engineers on IP verification and work with the physical design team on implementation.
  • Participate in design reviews and maintain design collateral, including documentation, RTL, SDC constraints, UPF/CPF power intent definitions, and LINT/CDC rule files and waivers.
  • Track industry trends, emerging technologies, and standards-body progress.

Requirements

  • Bachelor’s, Master’s, or Ph.D. in Electrical Engineering or a related field, or equivalent experience.
  • 5+ years of experience in high-speed digital design, preferably with retimer, gearbox, or Ethernet PMA/PCS logic.
  • Strong expertise in RTL and assertion coding with SystemVerilog.
  • Proficiency taking RTL through synthesis and producing a PPA-optimized frontend netlist.
  • Knowledge of Ethernet 802.3 clauses related to 100G/200G/400G/800G, Auto-Negotiation, and Link Training.
  • Strong bias for innovation across digital design, including automation of mundane activities and quality-improvement methods.
  • Experience integrating third-party mixed-signal IPs.
  • Proven experience working in a start-up-like environment.

Nice to have

  • Knowledge of DRAM controllers/PHYs and HBM memory.

Culture & Benefits

  • Fast-paced early-stage startup environment.
  • Cross-functional collaboration with experts working from first principles.
  • Focus on innovation, design quality, and manufacturable high-performance products.
  • Fun work environment with excellent benefits.

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