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8 дней назад

Principal Digital ASIC Design Engineer

95 000 - 275 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Principal Digital ASIC Design Engineer (Advanced Digital IC Design): Designing and implementing high-performance digital ASICs from RTL through synthesis with an accent on transistor-level circuit design, advanced-node technologies, and hardware optimization. Focus on developing complex chip architectures, guiding physical layout and design-for-test, solving performance and power challenges, and leading multidisciplinary engineering teams.

Location: Onsite in Cambridge, Massachusetts, United States

Base salary: $95,000–$275,000 per year

Company

hirify.global is an independent nonprofit research and development company delivering engineering solutions for national challenges across defense, space exploration, biomedical engineering, and other application areas.

What you will do

  • Design and simulate transistor-level circuits for advanced digital ASICs.
  • Implement designs from RTL through synthesis and contribute to system-level architecture.
  • Optimize hardware for performance, power, and cost, including low-power designs and advanced CMOS nodes.
  • Evaluate complex algorithms and requirements for hardware feasibility and independently solve architectural challenges.
  • Guide physical layout, floor-planning, extracted-parasitic simulation, and design-for-test development.
  • Lead technical contributions, support proposals, and develop best practices for less experienced engineers.

Requirements

  • Bachelor’s degree in engineering or a related field; a master’s degree is preferred.
  • 10+ years of ASIC hardware engineering experience with a bachelor’s degree, or 5–10 years with a master’s degree.
  • Experience with front-end digital systems design and Cadence or Synopsys design flows.
  • Fluency in SystemVerilog, Verilog, or VHDL, with familiarity with LINT, simulation, and synthesis.
  • Proficiency in integrated circuit design, semiconductor technology, computer architecture, and detailed design specifications.
  • Active U.S. Secret Clearance is required, and the position requires onsite work in Cambridge, MA.

Nice to have

  • Experience with CMOS advanced nodes below 32nm and successful tape-outs.
  • Experience with radiation-hardened electronics and low-power circuit design.
  • Familiarity with secure-system architectures, cryptographic encoders and decoders, or tagged processor architectures.
  • Experience leading and managing design teams.

Culture & Benefits

  • Collaborative, multidisciplinary research and development environment.
  • Programs supporting work-life balance and workplace flexibility.
  • Employee clubs, including photography and yoga.
  • Health and finance workshops, off-site social events, and discounts to local museums and cultural activities.

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