Mixed-Signal CMOS IC Design Engineer

Location: Menlo Park, California, with remote or hybrid work and occasional travel to the Bay Area of less than 10%

Annual salary: $160,000–$250,000 USD

Company

hirify.global develops mixed-signal ICs for AI and cloud computing systems.

What you will do

• Lead hands-on design and development of mixed-signal CMOS ICs from concept and architecture through production.
• Own block-level design, simulation, verification, layout, evaluation, and the full IC design cycle.
• Drive high-speed interconnect design, including PAM4 SerDes exceeding 112 Gbps in bulk CMOS and FinFET.
• Design and optimize Fractional-N synthesizers, multi-phase clock generation, charge pumps, power control, and other analog building blocks.
• Implement and verify CTLE, FFE, DFE, sample-and-hold equalizers, and other high-speed interconnect components.
• Collaborate with cross-functional teams to deliver projects and complete design tape-outs on schedule.

Requirements

• 10+ years of hands-on experience in CMOS mixed-signal IC design.
• Expertise in high-speed interconnects, Fractional-N synthesizers, PAM4 SerDes above 112 Gbps, equalizers, and multi-phase clock generation.
• Strong analog and digital mixed-signal design background, including charge pumps and power control.
• Master’s degree in Electrical Engineering or a related field.
• Strong communication, leadership, and project management skills.

Nice to have

• Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• Experience with bulk CMOS and FinFET technologies.
• Experience implementing new design methodologies and delivering high-quality designs in fast-paced environments.

Culture & Benefits

• Remote or hybrid work with flexible time off.
• Health benefits.
• Stock options plan.
• Equal opportunity and commitment to an inclusive workplace.