Senior Hardware Compute Architect (Photonic Compute)

Location: Aachen, Germany; on-site

Company

hirify.global develops graphene photonic solutions that connect chips through high-throughput, low-delay, and energy-efficient computing networks.

What you will do

• Define the hardware architecture of a hybrid compute engine combining electronic and photonic compute domains.
• Architect execution units, memory hierarchies, memory tiering strategies, system interfaces, and data fabrics.
• Design interconnect infrastructure covering bandwidth, latency, coherency, and die-to-die communication using UCIe-class, CXL, UALink, and NVLink-class technologies.
• Define hardware/software interfaces and workload mapping strategies with the Software Compute Architect.
• Evaluate performance, power, area, and scalability trade-offs through quantitative modeling before silicon implementation.
• Collaborate with photonics, circuit design, RTL, physical design, packaging, and downstream implementation teams, owning the architecture specification through sign-off.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
• 5+ years of experience designing compute hardware architecture at the SoC or system level.
• Deep expertise in execution units, workload mapping, memory hierarchy, and system-level architecture trade-offs.
• Experience with high-performance interconnects, data fabrics, heterogeneous compute systems, and protocols such as UCIe, CXL, UALink, or NVLink-class architectures.
• Experience with architectural modeling and quantitative performance, power, area, and scalability analysis.
• Experience with Python, C++, SystemC, architecture modeling and simulation tools, interconnect protocols, and workflows supporting RTL, physical design, and packaging.

Nice to have

• Familiarity with photonic or optical compute concepts and their integration with electronic compute architectures.
• Experience with heterogeneous architectures involving GPUs, DPUs, FPGAs, custom accelerators, or AI accelerator platforms.
• Experience contributing to CXL Consortium, UALink, or UCIe Consortium standards.

Culture & Benefits

• Flexible, human-centered processes designed to support work-life harmony.
• Autonomy and continuous learning opportunities for professional and personal development.
• Comprehensive insurance, pension, and virtual stock options.
• Open, inclusive, and collaborative work environment focused on innovation and individual contribution.