9 часов назад
Formal Verification Engineer (Chips & Silicon)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Formal Verification Engineer (Chips & Silicon): Developing formal verification methods and hybrid engines to ensure the correctness of AI-generated hardware designs. Focus on model checking, property verification, and automating assertion synthesis to verify complex RTL designs at scale.
Location: Palo Alto Office
Company
is an AI-driven hardware and semiconductor startup backed by top Silicon Valley investors and industry leaders, focused on building world models and agents to interact with the physical world.
What you will do
- Develop new formal verification methods to enable formal proofs of design correctness.
- Collaborate with RTL, verification, and ML research teams to build hybrid formal engines.
- Define formal properties and automate assertion synthesis for AI-generated hardware.
- Prototype research ideas and evaluate them on real RTL designs.
- Turn novel verification methods into practical, scalable systems.
Requirements
- 5+ years of experience in formal methods, theorem proving, or program analysis.
- Proficiency with formal verification tools such as JasperGold or VC Formal.
- Strong expertise in assertion-based verification (SVA).
- Experience with model checking and property decomposition.
- Knowledge of equivalence checking, abstraction refinement, and formal coverage.
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