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11 часов назад

Senior Principal Technologist – Memory (CXL)

205 000 - 255 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Principal Technologist – Memory (CXL): Driving the architecture and definition of data center memory solutions spanning system architecture, SoC memory subsystems, PCIe/CXL technologies, DRAM, and hardware-software co-design with an accent on customer-facing technical leadership and hyperscale infrastructure. Focus on integrating memory solutions into systems and racks, solving silicon-to-application bottlenecks, and influencing product roadmaps through customer and industry engagement.

Location: Fully in person in San Jose, California, United States; occasional travel may be required.

Salary: $205,000–$255,000 per year, depending on experience, level, and business need. Eligible for discretionary bonuses, incentives, and benefits.

Company

hirify.global develops semiconductor-based connectivity solutions and software for rack-scale AI infrastructure, integrating CXL, Ethernet, NVLink, PCIe, and UALink technologies.

What you will do

  • Drive the architecture and definition of future data center memory products and solutions.
  • Apply system architecture, SoC memory subsystem, PCIe/CXL, DRAM, and hardware-software co-design expertise.
  • Engage directly with customers and industry partners to identify bottlenecks and define technical solutions.
  • Influence product features, architecture decisions, and technology roadmaps.
  • Lead cross-functional technical initiatives and deliver solutions for hyperscale data center systems.
  • Articulate complex technical concepts, influence decisions, and build business cases.

Requirements

  • Bachelor’s degree in electrical engineering or computer engineering; a master’s degree or PhD is preferred.
  • At least 10 years of experience developing memory-related solutions and integrating them into data center systems or racks.
  • Deep protocol-level experience with PCIe 5/6 and CXL.
  • Expertise in OS software integration, including memory allocation and management.
  • Recent experience with silicon and SoC architecture involving memory controllers such as DDR, LPDDR, or HBM.
  • Strong understanding of memory components, data center system architecture, full-stack silicon-to-application integration, and customer-facing technical work.

Nice to have

  • Expertise in JEDEC memory interface specifications, memory ECC, and error handling.
  • Experience integrating products with BIOS, kernels, operating systems, tooling, and BMCs.
  • Board and system design experience, hands-on silicon development, and experience with industry organizations such as PCI-SIG, OCP, JEDEC, or CXL.

Culture & Benefits

  • Work is performed fully onsite in San Jose.
  • Occasional travel for customer meetings and industry events.
  • Discretionary bonus, incentives, and benefits are available.
  • A diverse and inclusive environment encourages contributions from people with different backgrounds and experiences.

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