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11 часов назад

Staff Engineer AI/ML (CPU Design)

143 000 - 275 000$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Staff Engineer AI/ML (CPU Design) (RISC-V): Defining and leading RTL development for an AI-enabled RISC-V CPU core with an accent on vector processing, matrix engines, and power, performance, and area optimization. Focus on microarchitecture research, out-of-order execution, cache and memory subsystems, and validating timing, reliability, testability, and power goals.

Location: Santa Clara, United States

Salary: $143,000–$275,000 per year

Company

hirify.global is a semiconductor foundry providing design, development, and fabrication services, including RISC-V CPUs and AI-enabled processors through its MIPS team.

What you will do

  • Lead RTL development for an AI-enabled RISC-V CPU core.
  • Drive microarchitecture and design critical CPU blocks, including vector and matrix processing engines.
  • Develop and refine microarchitecture specifications from architectural exploration through detailed design.
  • Optimize RTL for power, performance, area, and timing targets.
  • Support functional verification, RTL performance verification, and verification strategy development.
  • Partner with multidisciplinary engineering teams on physical design, reliability, testability, timing, area, and power validation.

Requirements

  • Hands-on experience with high-performance processors, vector processors, or GPUs.
  • Knowledge of datapath design for vector and matrix processing using floating-point and integer data types.
  • Thorough knowledge of microprocessor architecture, including instruction execution, branch prediction, scheduling, register renaming, reorder buffers, out-of-order execution, caches, and memory subsystems.
  • Knowledge of SystemVerilog, Verilog, and/or VHDL, plus experience with simulators and waveform debugging tools.
  • Understanding of logic design principles and their timing and power implications.
  • Master’s degree with 10+ years of experience or PhD with 5+ years of work experience.

Nice to have

  • Experience designing RISC-V, ARM, or MIPS CPUs.
  • Experience with hardware multithreading, virtualization, SIMD, vector-enabled, or matrix-enabled CPUs.
  • Experience with Perl or Python scripting.
  • Understanding of CPU integration at the SoC level and safety and security microarchitecture.

Culture & Benefits

  • Inclusive and multicultural workplace.
  • Equal opportunity employment regardless of legally protected characteristics.
  • Employment offers are subject to applicable background checks and local laws.
  • Reasonable accommodation is available during the employment process.

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