11 часов назад
Senior Design Verification Engineer (RISC-V)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Senior Design Verification Engineer (RISC-V): Developing processor models, automated instruction test generators, and verification tools for RISC-V hardware with an accent on test automation, processor architecture, and failure analysis. Focus on building self-checking test cases, validating new processor features, and closing verification coverage across simulation and FPGA-based systems.
Location: Hsinchu, Taiwan. Right to work in Taiwan is required.
Company
develops high-performance RISC-V compute platforms for applications including artificial intelligence, machine learning, automotive, data centers, mobile, and consumer devices.
What you will do
- Review and influence product specifications from a verification perspective.
- Collaborate with CPU designers, compiler, performance, and system verification teams on feature specifications and test plans.
- Implement an internal processor model supporting new RISC-V features and -specific designs.
- Develop automated random instruction generators that produce self-checking direct test cases.
- Build verification tools, test benches, and test suites using C, C++, and Python.
- Analyze failures, evaluate coverage, and support verification closure.
Requirements
- At least 3 years of recent experience with verification tools and methodologies, including RTL simulation, waveform tracing, and scripting.
- Experience with C/C++/Python development and embedded software command-line tools such as GCC, AS, and GDB.
- Solid understanding of processor and SoC architecture, or the ability to learn it quickly.
- Thorough understanding of verification flows, including test planning, test generation, failure analysis, coverage analysis, and closure.
- Ability to learn non-standard verification languages and methodologies such as Scala and Chisel.
- Strong collaboration, communication, product-quality, and cross-functional influencing skills.
Nice to have
- SystemVerilog experience.
- Experience prototyping and debugging systems on FPGA platforms.
Culture & Benefits
- Collaborative work with CPU designers and multidisciplinary engineering teams.
- Projects focused on innovative RISC-V processor technology.
- Inclusive and diverse workplace.
- Employment is subject to successful background and reference checks.
- Access to export-controlled technology requires applicable authorization or export approvals.
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