Principal Physical Design Engineer, STA

Location: San Jose, California, United States; fully on-site and in-person

Salary: USD 209,000–250,000 base salary annually

Company

hirify.global provides rack-scale AI infrastructure through connectivity solutions integrating CXL, Ethernet, NVLink, PCIe, UALink, and software technologies.

What you will do

• Drive timing closure from RTL through sign-off for complex connectivity SoCs.
• Develop and validate SDC constraints, including MMMC setups, and manage I/O timing budgets.
• Apply advanced-node sign-off methodologies at TSMC 7nm and below, including OCV, AOCV, and PVT analysis.
• Run hierarchical timing analysis with ETM libraries while balancing runtime and accuracy.
• Provide block- and full-chip timing feedback, root-cause analysis, and ECO guidance.
• Partner with RTL, physical design, implementation, and verification teams to achieve timing convergence.

Requirements

• Bachelor’s degree in Electrical Engineering or Computer Science; a Master’s degree is preferred.
• At least 10 years of timing analysis and sign-off experience for complex SoCs in server, storage, or networking applications.
• Expertise in timing constraints, STA methodology, and block- and full-chip timing closure.
• Strong knowledge of synthesis, place-and-route, extraction, and equivalence-checking flows at 7nm or below.
• Proficiency with Cadence and/or Synopsys physical design and STA toolchains.
• Strong scripting skills in Tcl, Python, and Perl, with the ability to work independently and prioritize effectively.

Nice to have

• Experience with high-speed SerDes or Ethernet PHY timing challenges.
• Knowledge of ECO methodologies, DFT tools, and test coverage analysis.
• Experience working with IP vendors on RTL and hard-macro integration.
• Familiarity with SystemVerilog or Verilog.

Culture & Benefits

• Base compensation is determined by location, experience, and comparable employee pay.
• A diverse and inclusive workplace encourages applications from people with varied backgrounds and experiences.