Signal Integrity & Power Integrity Engineer (FPGA)

Location: Penang, Malaysia

What you will do

• Lead end-to-end signal and power integrity design for IC packages, validation platforms, and development kit hardware.
• Define SI/PI simulation methodologies using advanced EDA tools and AI-assisted techniques.
• Model, simulate, review, and optimize package and board designs, including high-speed SERDES, die-to-die interconnects, memory interfaces, and FPGA fabric.
• Establish SI/PI design rules, perform design-of-experiments and post-layout simulations, and improve electrical design margins.
• Diagnose system-level challenges spanning electrical, mechanical, thermal, and manufacturing constraints.
• Collaborate with silicon architects, package engineers, SI/PI specialists, and board design teams on future heterogeneous packaging and platform architectures.

Requirements

• Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of hands-on Signal Integrity and Power Integrity engineering experience across silicon, package, and board-level designs.
• Deep knowledge of high-speed digital interfaces, SI/PI fundamentals, power delivery networks, electromagnetics, circuit analysis, and signal processing.
• Experience with ANSYS HFSS, Synopsys HSPICE, Cadence Sigrity, Keysight ADS, or equivalent simulation platforms.
• Hands-on experience with silicon, package, and board layout and design tools such as Mentor Graphics and Cadence Allegro.
• Strong analytical, problem-solving, data correlation, and validation skills.

Nice to have

• Scripting and automation experience with Python, MATLAB, or similar languages.
• Experience with AI-driven SI/PI methodologies and advanced or heterogeneous packaging solutions.

Culture & Benefits

• Regular full-time position.
• Shift 1 schedule aligned with Malaysia.
• Work spans silicon, package, board, and hardware platform development cycles.