14 часов назад
Semiconductor Product Engineer (AI Accelerators)
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Semiconductor Product Engineer (AI Accelerators): Developing and deploying manufacturing test solutions for next-generation AI accelerator devices across the silicon lifecycle, with an accent on ATE test content, DFT methodologies, high-speed interface testing, and advanced CMOS manufacturing. Focus on first-silicon bring-up, debugging complex silicon failures, optimizing yield and test cost, and supporting high-volume production and advanced packaging test flows.
Location: Bristol, United Kingdom
Company
is developing custom chips and systems to accelerate inference for frontier AI models.
What you will do
- Define manufacturing test strategies for AI accelerator chips targeting high-volume production.
- Plan and manage test content for advanced CMOS designs, including logic, SRAM, DRAM, and high-speed I/O.
- Develop and debug scan/ATPG, LBIST, MBIST, JTAG, and high-speed I/O test content.
- Bring up first silicon on ATE through pattern debugging, tester correlation, shmooing, and corner analysis.
- Characterize silicon, investigate failures, identify yield limiters, and optimize test coverage, time, and cost.
- Collaborate with DFT, design, packaging, OSAT, manufacturing, and external partner teams through qualification and production ramp.
Requirements
- 5+ years of hands-on semiconductor test engineering experience.
- Experience developing ATE test programs on Advantest 93K, Teradyne, or similar platforms.
- Strong understanding of DFT methodologies, including scan, ATPG, MBIST, and LBIST, together with memory test techniques.
- Experience debugging silicon issues and correlating failures with design or process causes.
- Familiarity with advanced CMOS nodes and production test challenges.
- Ability to work effectively in a cross-functional engineering environment.
Nice to have
- Experience testing AI accelerators, GPUs, networking ASICs, or other high-performance compute ICs.
- Experience with PCIe Gen5/Gen6, LPDDR4/5/6, or other high-speed interfaces.
- Exposure to advanced packaging, chiplets, or multi-die test flows.
- Experience improving yield, reducing test time, or optimizing cost in high-volume manufacturing.
Culture & Benefits
- High ownership and agency to drive work forward.
- Rapid iteration and direct collaboration with leadership to move from ideas to hardware.
- Close collaboration across hardware, software, silicon, and modelling teams.
- Private medical, dental, and vision coverage, contributory pension, and life/critical illness insurance.
- 25 days of holiday plus bank holidays, equity, and an inclusive office environment.
Hiring process
- Additional eligibility checks may be required because the work is subject to UK, US, and international export control regulations.
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