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15 часов назад

Physical Design - CAD Lead (Python)

180 000 - 220 000$
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
Physical Design - CAD Lead (Python/PD Flows): Building physical design flows, methodology, and infrastructure for energy-efficient edge AI processors with an accent on FinFET technologies, multi-patterning, and repeatable signoff workflows. Focus on developing regression frameworks, workflow orchestration, collateral validation, and unified flow environments across multiple product lines.

Location: San Jose, CA; Pittsburgh, PA; or Austin, TX

Salary: $180,000–$220,000 per year, plus equity and benefits.

Company

hirify.global develops energy-efficient general-purpose processors for continuous AI/ML and intelligent edge computing.

What you will do

  • Drive and develop physical design flows and methodology for FinFET and multi-patterning technologies using Cadence Tempus or Synopsys PrimeTime.
  • Build repeatable, predictable, design- and process-agnostic PD flows for multiple product lines.
  • Develop workflow orchestration, flow infrastructure, regression frameworks, and collateral quality-checking utilities.
  • Partner with physical design leads to define end-to-end build, timing, and signoff flows.
  • Create a unified environment for standard-cell, memory, PDK, hard-IP, corner, and flow configuration dependencies.
  • Coordinate third-party vendor resources and continuously improve flow consistency and efficiency.

Requirements

  • Master’s degree in Electrical Engineering with 5+ years of industry experience, or PhD in Electrical Engineering with 3+ years of industry experience.
  • Strong Python and scripting skills, including TCL and shell.
  • Experience developing workflow orchestration infrastructure or tools for hardware development, such as Airflow or Flowtracer.
  • Familiarity with Kubernetes and containerization, plus experience implementing regression frameworks.
  • SQL or database proficiency, such as MongoDB.
  • Intimate knowledge of physical design and RTL/DV hardware development workflows.

Nice to have

  • Experience with full-chip RTL/DV and physical design flows.
  • Knowledge of circuit design, device physics, deep-submicron and SOI technologies.
  • Experience defining static timing analysis constraints, clock-tree and signoff corners, and voltage definitions.
  • Experience integrating analog or mixed-signal macros and verifying IP collateral.

Culture & Benefits

  • Meaningful equity program.
  • 401(k) match and company-paid benefits.
  • Paid parental leave.
  • Flexible work arrangements and support for personal and professional development.

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