Senior FPGA Engineer, Networking & Security (Aerospace)

Location: Hybrid; on-site in San Jose, California three days per week. Applicants must meet U.S. export-control eligibility requirements.

Salary: $213,000–$237,000 per year, plus equity and benefits.

Company

hirify.global designs, builds, and operates LEO satellite constellations and spacecraft systems for mission-critical Earth intelligence and remote sensing.

What you will do

• Define onboard networking architecture, including Ethernet switching, routing, packet filtering, firewalling, deep packet inspection, and VPN concepts.
• Design and implement end-to-end, router-level, and file-based encryption for onboard and downlink data.
• Build spacecraft Network-on-Chip fabrics, FPGA-to-FPGA links, Ethernet PHY/MAC integrations, link aggregation, and link-health monitoring.
• Apply Reed-Solomon and other FEC schemes, translating BER and link-budget requirements into RTL implementations.
• Integrate the network fabric with customer payloads and validate low-level link interoperability.
• Collaborate with the Staff Onboard Compute Architect, Electrical Engineering, payload, and HPC teams, while authoring technical white papers and architectural documentation.

Requirements

• 5+ years of professional FPGA engineering experience with a focus on networking, cryptography, security, or high-speed I/O.
• Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related field.
• Hands-on experience with Ethernet, link aggregation, high-rate direct-attached copper lanes, and signal-integrity trade-offs.
• Practical hardware or firmware experience with AES, AES-GCM, ECC, IPSec/VPN handshakes, and familiarity with post-quantum cryptography.
• Experience with packet flows, switching, routing, filtering, deep packet inspection, firewalling, VPN termination, Reed-Solomon FEC, and modern FPGA verification.
• Must be able and willing to obtain and maintain a U.S. security clearance and satisfy U.S. export-control access requirements.

Nice to have

• Experience with spacecraft Ethernet or SpaceWire networks and FPGA-based NoC fabrics.
• Familiarity with space-grade or radiation-tolerant FPGA platforms.
• Experience with spacecraft avionics, payload data handling, or secure space-to-ground links.
• Contributions to standards bodies, open-source cryptographic implementations, or published research.

Culture & Benefits

• Full-time employment with equity compensation.
• Medical, dental, and vision insurance, plus a 401(k) retirement plan.
• Short- and long-term disability and life insurance.
• Three weeks of paid vacation for new employees, 12 paid holidays, unlimited sick time, and paid parental leave.
• Equal employment opportunity and reasonable accommodation support.