Senior Member of Technical Staff (Advanced Packaging Pathfinding)

Location: Science Park II, Singapore; moving to Tampines in December 2026

Company

hirify.global develops materials engineering solutions, equipment, and services for semiconductor and advanced display manufacturing.

What you will do

• Drive N+2 and beyond pathfinding for advanced packaging, interconnect scaling, materials, and integration architectures.
• Lead feasibility studies and hands-on development for D2W, RDL, CoWoS, TSV, hybrid bonding, and heterogeneous integration concepts.
• Design experiments, simulations, test vehicles, prototypes, and demonstration vehicles to validate new technologies and reduce technical risk.
• Develop scaling frameworks and design–process co-optimization strategies addressing performance, cost, and reliability.
• Translate customer requirements and system trends in AI, HPC, memory integration, and chiplets into technical solutions.
• Collaborate with suppliers, equipment teams, OSATs, foundries, research partners, and cross-functional teams while influencing technology roadmaps and mentoring junior engineers.

Requirements

• 10–15+ years of experience in semiconductor technology, advanced packaging, process integration, or related domains.
• Experience in technology development, pathfinding, or exploratory R&D.
• Strong knowledge of advanced packaging technologies, including RDL, TSV, CoWoS, and related integration approaches.
• Ability to solve complex technical problems and translate concepts into experimental validation.
• Strong communication skills for presenting technical insights, risks, trade-offs, and business relevance.
• Advanced degree in materials science, electrical engineering, mechanical engineering, physics, or a related field is preferred.

Nice to have

• Experience with heterogeneous integration, chiplet architectures, or next-generation interconnect technologies.
• Patents, publications, or first-of-a-kind technical solutions.
• Familiarity with design–process co-optimization and system-level trade-offs.

Culture & Benefits

• Supportive work culture focused on learning, development, and career growth.
• Collaboration with R&D teams and ecosystem partners on advanced semiconductor and display technologies.
• Regular travel required for approximately 10% of the time.
• Relocation eligibility is provided.
• Full-time regular employment.