Distinguished Engineer, Switch Architect (AI Networking)

Location: Santa Clara, California, United States. Applicants must be eligible to access export-controlled technology and software under U.S. export control laws; some applicants may require an export license review before employment.

Salary: $220,280–$330,000 per annum

Company

hirify.global develops semiconductor solutions and data infrastructure technologies for enterprise, cloud, AI, and carrier architectures.

What you will do

• Define architectures for next-generation AI networking switch ASICs serving hyperscale cloud and ML/AI workloads.
• Analyze emerging technologies and influence long-term product roadmaps and architectural direction.
• Develop architectural and performance models covering latency, power, bandwidth, and scalability trade-offs.
• Contribute to Ultra Ethernet and Ultra Accelerator Link standards.
• Align silicon, software, systems, product, and customer engineering perspectives.
• Represent hirify.global in standards bodies, research consortiums, and strategic customer discussions while mentoring engineering teams.

Requirements

• BS with 15+ years, MS with 10+ years, or PhD with 8+ years of experience in electrical engineering, computer engineering, computer science, or a related field.
• Extensive experience architecting large-scale ASICs and complex networking semiconductor systems.
• Deep knowledge of high-speed interconnects, Ethernet protocols, traffic management, packet processing, and AI training and inference fabrics.
• Hands-on experience with performance modeling, simulation, and architectural trade-off analysis.
• Proficiency in C/C++, Python, and modeling environments.
• Eligibility to access U.S. export-controlled information is required; export license review may apply.

Nice to have

• Experience contributing to or leading industry standards development.
• Experience mentoring engineering talent and influencing product direction.

Culture & Benefits

• Collaboration across silicon, systems, software, product, and customer engineering teams.
• Opportunity to influence semiconductor standards and hyperscale networking ecosystems.
• Employee stock purchase plan with a two-year lookback.
• Family support programs, mental and physical health resources, and recognition awards.

Hiring process

• Interviews evaluate individual experience, thought process, and communication skills in real time.
• AI tools, transcription applications, automated answer generators, and automated note-taking bots are not permitted during interviews.