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2 дня назад

Senior/Principal SoC Architect (AI)

250 000 - 350 000$
Формат работы
remote (только USA)
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior/Principal SoC Architect (AI): Defining and delivering next-generation SoC and chiplet architectures for large-scale AI and data-center compute platforms with an accent on high-speed connectivity, memory subsystems, and system-level performance modeling. Focus on making performance, power, area, cost, and schedule tradeoffs, guiding implementation through tapeout and silicon bring-up, and tuning first-silicon performance.

Location: Santa Clara, California, United States

Salary: $250,000–$350,000 per year

Company

An early-stage semiconductor company developing next-generation compute platforms for large-scale AI and data-center workloads.

What you will do

  • Define end-to-end SoC and chiplet architectures for high-performance compute platforms.
  • Develop detailed architectural specifications covering connectivity, memory, processor subsystems, boot, security, power, reset, and clocking.
  • Model bandwidth, latency, traffic behavior, and system-level performance.
  • Make tradeoffs across performance, power, area, cost, complexity, and schedule.
  • Partner with RTL, firmware, verification, physical design, packaging, and software teams through implementation.
  • Guide tapeout, first-silicon bring-up, validation, debugging, system integration, and performance tuning.

Requirements

  • Proven experience architecting complex SoCs that reached silicon and shipped in production systems.
  • Strong knowledge of SoC subsystems, high-speed I/O, coherent or non-coherent interconnects, and multi-device communication.
  • Experience with memory-subsystem architecture, bandwidth modeling, and memory-controller integration.
  • Knowledge of processor complexes, boot, security, power, reset, and clocking architecture.
  • Ability to translate ambiguous requirements into concrete, verifiable designs and make architecture tradeoffs.
  • Experience collaborating across architecture, RTL, firmware, verification, physical design, packaging, and post-silicon teams.

Nice to have

  • Chiplet or multi-die SoC architecture and high-speed die-to-die interfaces.
  • Advanced memory technologies, AI accelerators, GPUs, custom compute silicon, or data-center processors.
  • High-bandwidth networking, system-level performance modeling, silicon bring-up, and post-silicon optimization.
  • Hardware-software co-design and experience in early-stage semiconductor environments.

Culture & Benefits

  • Hands-on, execution-focused work across the full SoC lifecycle.
  • Close collaboration across multiple engineering disciplines.
  • Opportunity to work in an early-stage semiconductor environment and contribute to production silicon.

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