Junior Layout Engineer (Analog IC)

Location: Catania, Italy

Company

hirify.global develops industrial and IoT edge-processing solutions, including microcontrollers and high-performance processors for automation, consumer electronics, and intelligent edge applications.

What you will do

• Deliver IP-level floorplans and advanced floorplan strategies.
• Design analog layout blocks for MCU and custom analog products.
• Contribute to power supply strategies and signal distribution between blocks.
• Run DRC, LVS, DFM, and parasitic extraction checks to ensure high-quality layouts.
• Participate in design reviews, documentation, product integration, and cross-functional collaboration.
• Develop technical training and layout guidelines while supporting design quality and long-term reliability.

Requirements

• 0–2 years of experience leading analog layout activities for complex ICs.
• BSEE, MSEE, or equivalent professional experience.
• Experience with analog layout, device physics, and IC ESD protection strategies.
• Experience with Cadence Virtuoso, including OA and PVS, and Mentor Graphics Calibre.
• Experience with IP-level physical implementation of analog blocks.
• Ability to collaborate with specialists across design, test, program management, and quality functions.

Culture & Benefits

• Work in a fast-paced consumer electronics environment.
• Collaborate with global partners and multidisciplinary engineering teams.
• Contribute to complete product development across design, architecture, verification, DfT, and physical design.
• Support the development of high-performance, reliable microcontrollers and analog products.