Digital Verification (SystemVerilog)

Location: Austin (Oakhill, Office), United States

Salary: $165,830 per year

Company

hirify.global develops semiconductor technologies and memory IP solutions.

What you will do

• Develop models and verification environments for digital functional verification and MRAM memory controller verification.
• Plan and implement verification strategies for IP, subsystem, and IC-level designs.
• Create verification plans, test cases, assertions, and functional coverage bins.
• Debug waveforms and analyze functional, toggle, and code coverage to identify and close coverage gaps.
• Create and maintain UVM testbench components and project scripts, including support for legacy testbenches.
• Review memory controller specifications and ensure verified memory IP is delivered to the SoC team.

Requirements

• Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
• Five years of progressive post-baccalaureate experience in the offered role, Solutions Architecture, Project Engineering, Application Engineering, or similar work.
• Five years of experience with SystemVerilog and C/C++.
• Experience with ARM and DSP architectures, cache and flash memory controllers, and SoC-level verification of ARM-based microcontrollers.
• Experience with Cadence, gate-level simulations, and IP-level verification.

Culture & Benefits

• Full-time onsite employment in Austin.
• Equal opportunity and affirmative action employer.
• Reasonable accommodations are provided for otherwise qualified individuals with disabilities.