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2 дня назад

Senior Emulation Engineer (SoC)

158 600 - 237 600$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR

Senior Emulation Engineer (SoC): Lead the development of complex SoC emulation models, including design integration, environment setup, compilation, and debug across industry-leading platforms like Veloce, ZeBu, Palladium with an accent on emulation bring-up, test plans, and system validation. Focus on debugging complex issues across RTL, firmware, and platforms, optimizing performance, and automating flows through scripting.

Location: Santa Clara, CA (onsite). Must be eligible to access US export-controlled information (US citizen, lawful permanent resident, or protected individual).

Salary: $158,600 - $237,600 per annum

Company

hirify.global’s semiconductor solutions power data infrastructure for enterprise, cloud, AI, and carrier architectures.

What you will do

  • Lead development of complex SoC emulation models, including integration, setup, compilation, and debug on Veloce, ZeBu, Palladium.
  • Drive emulation bring-up with clock/reset sequencing, firmware boot, and system validation.
  • Create and execute test plans for verification, performance analysis, software development, and multi-team validation.
  • Collaborate with RTL design, verification, and firmware teams to define requirements and ensure integration.
  • Debug SoC/subsystem issues across RTL, firmware, platforms, and toolchains.
  • Optimize emulation performance via partitioning, timing, runtime; automate flows with Python, Perl, Tcl, shell.
  • Interface with EDA vendors (Synopsys, Cadence, Siemens) for tools and features.

Requirements

  • BS in Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of emulation experience (or MS/PhD with 5+ years).
  • Experience with SystemVerilog and UVM.
  • Extensive knowledge and hands-on experience with emulation platforms from Synopsys, Cadence, Siemens for complex SoC models.
  • Proficient in emulation bring-up, reset sequences, firmware bring-up.
  • Strong knowledge of processor architecture, SoC components, interconnects, I/O protocols (PCIe, CXL, Ethernet), memory (DDR, HBM).
  • Skilled in Perl, Python, Tcl, UNIX shell; good C++ and ARM assembly programming.
  • Ability to define emulation strategy, test plans, and drive verification for large-scale products.

Culture & Benefits

  • Comprehensive benefits covering financial well-being, family support, mental/physical health, and recognition.
  • Employee stock purchase plan with 2-year look back.
  • Family support programs for work-life balance.
  • Robust mental health resources.
  • Recognition and service awards for contributions and milestones.

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