Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Выше рынка
$106к-149к/год
$88к$110кмедиана$130к
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Company hidden предлагает чётко очерченную стартовую роль в полупроводниках с зарплатой выше рыночного ориентира и работой над важными технологиями памяти; главный компромисс - обязательная работа в офисе в Фолсоме.
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Circuit Design Engineer (Semiconductor): Designing and optimizing digital circuits for SRAM, register files, memory compilers, and caches with an accent on schematic entry, simulation, verification, and power, performance, and area optimization. Focus on developing DFT models and memory test tools, characterizing memory instances, and resolving circuit issues affecting leakage, robustness, yield, and efficiency.
Location: On-site in Folsom, California, United States
Annual salary: $105,650–$149,150 USD
Company
hirify.global develops semiconductor technologies and data center solutions through its Data Center Group.
What you will do
Design and optimize digital circuits for SRAM, register files, memory compilers, and caches.
Perform circuit design, schematic entry, simulation, and functionality verification for major blocks.
Create block-level DFT models and develop memory test tools.
Improve design flows and methodologies for greater efficiency.
Collaborate with architecture, layout, and cross-functional teams to optimize performance, power, area, and yield.
Characterize memory instances and memory compilers while resolving leakage, robustness, and circuit performance issues.
Requirements
Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with 1+ years of educational or work experience, or a master’s degree in the same field with 3+ months of educational experience.
Experience with circuit simulation tools and methodologies.
Experience with digital circuit design, schematic entry, and verification processes.
Analytical problem-solving, attention to detail, initiative, collaboration, and clear technical communication.
Ability to work on-site in Folsom, California.
Nice to have
Experience optimizing circuits for power, performance, area, and yield.
Understanding of DFT models and memory characterization techniques.
Culture & Benefits
Full-time employment with health, retirement, vacation, and other employee benefits.
Competitive pay and stock bonuses.
Opportunity to work with experienced engineers on semiconductor technologies used in data centers.
Work is performed on Shift 1 in the United States of America.
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