Power Validation Engineer (AI Hardware)

Location: San Jose, United States; on-site. Relocation support is available for candidates moving to San Jose.

Company

hirify.global builds integrated chips, racks, software, and manufacturing systems for high-throughput, low-latency AI inference.

What you will do

• Own end-to-end power characterization of ASICs and mezzanine-card platforms from silicon bring-up through production qualification.
• Design measurement campaigns across voltage rails and workloads, defining power envelopes and derating curves for thermal and PDN specifications.
• Validate VRM and PDN performance, including load-step response, PCIe compliance, impedance, transient behavior, and decoupling strategy.
• Build automated power-sweep and DUT qualification frameworks covering inference workloads, stress testing, telemetry, sequencing, and fault injection.
• Analyze thermal, electrical, firmware, and test data to identify root causes, reliability risks, throttling behavior, and component or design defects.
• Collaborate with RTL, physical design, hardware, firmware, diagnostics, manufacturing, and overseas production partners to improve released and new products.

Requirements

• Bachelor’s degree in Electrical Engineering or a related field.
• Deep understanding of ASIC and system-level power delivery, including VRM topology, PDN impedance, decoupling, and transient response.
• Hands-on experience with precision shunts, isolated differential probes, VNA-based impedance measurements, oscilloscopes, and laboratory instruments.
• Experience with multi-phase power solutions, VR tuning, defined power test plans, and silicon bring-up.
• Ability to design experiments that isolate root causes in complex hardware-software systems and detect workload- or environment-specific defects.

Nice to have

• Master’s degree in Power Electronics or experience with 800V-plus testing.
• Power validation experience with AI accelerators, GPUs, high-performance servers, HBM, or memory power-management interfaces.
• Experience with OpenBMC, IPMI, BMC firmware, PMBus, LLM inference stacks, or Linux kernel power management.
• Python proficiency for test automation, data pipelines, and statistical analysis.

Culture & Benefits

• Fully in-person engineering team based in San Jose, with cross-disciplinary collaboration between engineering and research.
• Medical, dental, and vision coverage, plus a $500 monthly credit for waiving medical benefits.
• $2,000 monthly housing subsidy for employees living within walking distance of the office.
• Relocation support, wellness benefits, and daily lunch and dinner at the office.
• Unlimited compute budget subject to ROI justification.